ARCHIVES
Research Article
Investigation on Reversible VM Using Cadence Technology
S.Tharunya1
Deepika Rani Sona2
Kalapraveen Bagadi3
1,2,3Department of Information Technology, VelTechRangarajanDrSagunthala R&D Institute of Science and Technology,India.
Published Online: May-June 2021
Pages: 01-03
Cite this article
No DOIReferences
1. Rakshith S, Rakshith T, „Optimized Reversible Vedic Multipliersorlowpoweroperations‟IEEEConferenceonInformationandcommunication Technologies,2013.
2. Thapliyal,HandSrinivas,M,B,“NovelReversibleMultiplierArchitectureUsingReversibleTSGGate”,ProceedingsonIEEEInternationalCo
nferenceonComputerSystemsandApplications,2006,pp.100-103.
3. Shams, M, Haghparast, M and Navi, K, “Novel Reversible
MultiplierCircuitinNanotechnology”,WorldAppliedScienceJournal,Vol.3,No.5,2008,pp.806-810.
4. Kotilakshmi,SanthoshkumarandRameshwarRao,‟ImplementationofVedic Multiplier Using Reversible Gates‟, International
Conference onComputerscienceandInformation Technology,2015,pp125-134.
5. Vijay K Panchal and Vimal H Nayak, ‟Analysis of multiplier
circuitusingreversiblelogic„,InternationaljournalforInnovativeResearchinScienceandTechnology, Vol1, Issue6,Nov2014.
6. Ratna Raju et.al.,‟ A High Speed 16*16 Multiplier Based on UrdhvaTiryakbhyam Sutra‟, International Journal of Science
Engineering andAdvanceTechnology,Vol1,Issue5,2013.
2. Thapliyal,HandSrinivas,M,B,“NovelReversibleMultiplierArchitectureUsingReversibleTSGGate”,ProceedingsonIEEEInternationalCo
nferenceonComputerSystemsandApplications,2006,pp.100-103.
3. Shams, M, Haghparast, M and Navi, K, “Novel Reversible
MultiplierCircuitinNanotechnology”,WorldAppliedScienceJournal,Vol.3,No.5,2008,pp.806-810.
4. Kotilakshmi,SanthoshkumarandRameshwarRao,‟ImplementationofVedic Multiplier Using Reversible Gates‟, International
Conference onComputerscienceandInformation Technology,2015,pp125-134.
5. Vijay K Panchal and Vimal H Nayak, ‟Analysis of multiplier
circuitusingreversiblelogic„,InternationaljournalforInnovativeResearchinScienceandTechnology, Vol1, Issue6,Nov2014.
6. Ratna Raju et.al.,‟ A High Speed 16*16 Multiplier Based on UrdhvaTiryakbhyam Sutra‟, International Journal of Science
Engineering andAdvanceTechnology,Vol1,Issue5,2013.
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