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Research Article

A Study on Unified Modelling Approach for Memristor: Next Generation Semiconductor Devices

Dr. K. Paramasivam1 Ameer M2 Bala Krishna R M3 Kishore K4
1Professor, EEE Department, Kumaraguru College of Technology, Coimbatore, Tamil Nadu, India. 2,3,4 UG scholar, EEE Department, Kumaraguru College of Technology, Coimbatore, Tamil Nadu, India.

Published Online: May-June 2024

Pages: 25-31

References

[1]. Wikipedia - https://en.m.wikipedia.org/wiki/Memristor#
[2]. J. Reuben, D. Fey and C. Wenger, "A Modeling Methodology for Resistive RAM Based on Stanford-PKU Model With Extended Multilevel
Capability," in IEEE Transactions on Nanotechnology, vol. 18, pp. 647-656, 2019, doi: 10.1109/TNANO.2019.2922838.
[3]. https://knowm.org/memristor-models-in-ltspice/
[4]. Humood, K., Saylan, S., Mohammad, B. et al. Effect of the Compliance Current on the Retention Time of Cu/HfO2-Based Memristive
Devices. Journal of Elec Materi 50, 4397–4406 (2021). https://doi.org/10.1007/s11664-021-08995-5
[5]. A Compact Model for Metal–Oxide Resistive Random Access Memory With Experiment Verification Zizhen Jiang, Student Member, IEEE,
Yi Wu, Shimeng Yu, Member, IEEE, Lin Yang, Kay Song, Zia Karim, Member, IEEE, and H.-S. Philip Wong, Fellow, IEEE
[6]. Guan, Ximeng & Yu, Shimeng & Wong, H.-S. Philip. (2012). On the Switching Parameter Variation of Metal-Oxide RRAM—Part I:
Physical Modeling and Simulation Methodology. IEEE Transactions on Electron Devices - IEEE TRANS ELECTRON DEVICES. 59. 1172-
1182. 10.1109/TED.2012.2184545.
[7]. B. Hajri, H. Aziza, M. M. Mansour and A. Chehab, "RRAM Device Models: A Comparative Analysis With Experimental Validation," in
IEEE Access, vol. 7, pp. 168963-168980, 2019, doi: 10.1109/ACCESS.2019.2954753.
[8]. Compact Modeling of Complementary Switchingin Oxide-Based ReRAM Devices
[9]. Camilla La Torre , Alexander F. Zurhelle , Thomas Breuer, Rainer Waser, Member, IEEE,and Stephan Menzel , Member, IEEE

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